User:Average/Computer Engineers Handbook
This book is for those who want to maximize the utility of general purpose computers. This could be processing efficiency (power consumption), speed, I/O, and interconnectability (like SMP). STUB The first maxim of computation is discriminability: the means to differentiate between one state and another. Analog or digital, without that, you don't have computation because you can't create reasonable logic. Digital logic is born out of this maxim and binary arithmetic it's crowning achievement.
A general purpose computer, then, is a logic machine that:
- accepts user input and emits some form of output (the second maxim)
- has some, specified, minimal set of data manipulation capability (the third maxim), namely:
- ability to move data from one place to another. (perhaps requiring an intermediate storage or instruction)
- can perform OR (add) and AND/(subtract), possibly NOT (flip-state) operations
- has a conditional jump (branching) ability.
- has memory (storage) "sufficient for the task".
This handbook will focus exclusively on digital logic.
CPU[edit]
On-chip logic should be for the most common tasks, such that such tasks can occur within as few clock cycles as possible, and with minimal redundant logic (heat minimization). Tasks that require multiple, smaller tasks can be hardwired so that they can load result registers within some guaranteed timing.
Find minimal practical logic, and implement that at the core, perhaps redundantly. Outside those common functions, much computation happens with blocks of memory indexed at word boundaries (a separate looping logic?), basic arithmetic, and management of devices with long latencies. Common
Modularize CPU logic on the aforementioned conceptual boundaries:
- Boot-logic: BIOS for starting the machine, identifying hardware, establishing function vectors
- ALU: Arithmetic logic unit
- MMU: Memory management unit
- PMU: Persistance management unit
Karnaugh maps minimize logic redundancy, so that no unnecessary electric flow occurs creating heat.
I/O[edit]
Clock timing: multiple-phased clocks for increased logic speed.
Bus width: In every known case by this author, where you have a contained (or shielded) environment, parallel buses are superior. They offer perhaps 128 bits of data passed per clock cycle vs. 1.
caching: write-thru cache allows sending data to main memory while keeping local copies closer
timing delays
